FIG. 28 is a circuit diagram showing a configuration of a conventional phase-shifting circuit disclosed in C. F. Campbell and S. A. Brown, “A Compact 5-Bit Phase Shifter MMIC for K-Band Satellite Communication Systems”, IEEE IMS2000 Proceedings. In FIG. 28, the phase-shifting circuit includes a high frequency signal input terminal 101, high frequency signal output terminal 102, first field-effect transistor (abbreviated to “FET” from now on) 103, second FET 104, first inductor 105, second inductor 106, third inductor 107, capacitor 108 and ground 109.
In the circuit, the field-effect transistor (abbreviated to “FET” from now on) 103 operates as a switch for switching between an ON state and OFF state. When a voltage equipotential to a drain voltage and source voltage is applied to a gate terminal, the FET 103 enters into an ON state, and exhibits a resistive property (called “ON resistance” from now on). On the other hand, when a voltage equal to or less than a pinch-off voltage is applied to the gate terminal, the FET 103 enters into an OFF state, and exhibits a capacitive property (called “OFF capacitance” from now on). The other FET 104 operates in the same manner as the FET 103.
FIG. 29 is a circuit diagram showing an equivalent circuit when bringing the FET 103 into the OFF state and FET 104 into the ON state in the phase-shifting circuit of FIG. 28. Here, the reference numeral 110 designates a combined capacitance of the OFF capacitance of the FET 103 and the capacitor 108, and 111 designates the ON resistance of the FET 104. In this case, the equivalent circuit shown in FIG. 29 can be considered as a high-pass filter (abbreviated to “HPF” from now on) composed of the combined capacitance 110, inductor 105 and inductor 106. A high frequency signal input to the high frequency signal input terminal 101 undergoes a phase lead through the HPF, and is output from the high frequency signal output terminal 102.
FIG. 30 is a circuit diagram showing an equivalent circuit when bringing the FET 103 into ON state and FET 104 into OFF state in the phase-shifting circuit of FIG. 28. Here, the reference numeral 112 designates the ON resistance of the first FET 103, and 113 designates the OFF capacitance of the second FET 104. The parallel circuit composed of the inductor 107 and OFF capacitance 113 is set in such a manner as to produce a parallel resonance state at a desired frequency f0. In this case, the equivalent circuit shown in FIG. 30 can be considered as a bandpass filter (abbreviated to “BPF” from now on) that passes a high frequency signal near the frequency f0 under the assumption that the reactance the inductor 105 and inductor 106 exhibit is sufficiently greater than the ON resistance 112. The high frequency signal input to the high frequency signal input terminal 101 is output from the high frequency signal output terminal 102 with nearly zero phase variation through the BPF.
Here, the difference between the phase lead caused by the HPF and the phase variation caused by the BPF is referred to as a necessary phase shift amount. The high frequency signal input through the high frequency signal input terminal 101 obtains the desired phase shift amount by switching the ON/OFF state of the FET 103 and FET 104, and is output from the high frequency signal output terminal 102.
As described above, since the conventional phase-shifting circuit must set the cutoff frequency of the HPF at a frequency lower than the desired frequency bandwidth, the size of the circuit increases as the frequency becomes lower. In addition, since the cutoff frequency of the HPF must be lowered with the reduction in the phase shift amount, the circuit has a problem of increasing its size.
The present invention is implemented to solve the foregoing problems. Therefore it is an object of the present invention to provide a phase-shifting circuit and multibit phase shifter with characteristics of a small size and low loss.